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LTC1436A LTC1436A-PLL/LTC1437A High Efficiency Low Noise Synchronous Step-Down Switching Regulators DESCRIPTION
The LTC(R)1436A/LTC1437A are synchronous step-down switching regulator controllers that drive external N-channel power MOSFETs in a phase lockable, fixed frequency architecture. The Adaptive PowerTM output stage selectively drives two N-channel MOSFETs at frequencies up to 400kHz while reducing switching losses to maintain high efficiencies at low output currents. An auxiliary 0.5A linear regulator using an external PNP pass device provides a low noise, low dropout voltage source. A secondary winding feedback control pin (SFB) guarantees regulation regardless of the load on the main output by forcing continuous operation. An additional comparator is available for use as a lowbattery detector. A power-on reset timer (POR) is included which generates a signal delayed by 65536/fCLK (300ms typically) after the output is within 5% of the regulated output voltage. Internal resistive dividers provide pin selectable output voltages with remote sense capability. The operating current level is user-programmable via an external current sense resistor. Wide input supply range allows operation from 3.5V to 30V (36V maximum).
, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power is a trademark of Linear Technology Corporation.
FEATURES
s s s s s
s s
s s s s s s s s s
Maintains Constant Frequency at Low Output Currents Dual N-Channel MOSFET Synchronous Drive Programmable Fixed Frequency (PLL Lockable) Wide VIN Range: 3.5V to 36V Operation Low Minimum On-Time (300ns) for High Frequency, Low Duty Cycle Applications Very Low Dropout Operation: 99% Duty Cycle Low Dropout, 0.5A Linear Regulator for CPU I/O or Low Noise Audio Supplies Built-In Power-On Reset Timer Programmable Soft Start Low-Battery Detector Remote Output Voltage Sense Foldback Current Limiting (Optional) Pin Selectable Output Voltage Logic Controlled Micropower Shutdown: IQ < 25A Output Voltages from 1.19V to 9V Available in 24-Lead Narrow SSOP and 28-Lead SSOP Packages
APPLICATIONS
s s s s s
Notebook and Palmtop Computers, PDAs Cellular Telephones and Wireless Modems Portable Instruments Battery-Operated Devices DC Power Distribution Systems
TYPICAL APPLICATION
COSC 43pF CSS 0.1F RC 10k COSC RUN/SS VIN TGL TGS ITH CC 510pF SGND 100pF VPROG VOSENSE SENSE - 1000pF BG PGND SENSE + LTC1436A INTVCC BOOST SW DB CMDSH-3
VIN 4.5V TO 22V M1 Si4412DY
M3 IRLML2803
CB 0.1F
L1 4.7H
+
4.7F
M2 Si4412DY
D1 MBRS140T3
Figure 1. High Efficiency Step-Down Converter
U
U
U
+
CIN 22F 35V x2 RSENSE 0.02 VOUT 1.6V 5A R1 35.7k R2 102k
+
COUT 100F 6.3V x2
1436 F01
1
LTC1436A LTC1436-PLL-A/LTC1437A
ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage (VIN).........................36V to - 0.3V Topside Driver Supply Voltage (Boost) ......42V to - 0.3V Switch Voltage (SW)............................. VIN + 5V to - 5V EXTVCC Voltage .........................................10V to - 0.3V POR, LBO Voltages ....................................12V to - 0.3V AUXFB Voltage ..........................................20V to - 0.3V AUXDR Voltage ..........................................28V to - 0.3V SENSE +, SENSE -, VOSENSE Voltages.................. INTVCC + 0.3V to - 0.3V VPROG Voltage..................................... INTVCC to - 0.3V PLL LPF, ITH Voltages ...............................2.7V to - 0.3V AUXON, PLLIN, SFB, RUN/SS, LBI Voltages ..........................10V to - 0.3V Peak Driver Output Current < 10s (TGL, BG) .......... 2A Peak Driver Output Current < 10s (TGS) ......... 250mA INTVCC Output Current ......................................... 50mA Operating Temperature Range LTC143XAC ............................................. 0C to 70C LTC143XAI ........................................ - 40C to 85C Junction Temperature (Note 1) ............................. 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW COSC 1 RUN/SS 2 LBO 3 LBI 4 ITH 5 SFB 6 SGND 7 VPROG 8 VOSENSE 9 SENSE - 10 SENSE + 11 AUXON 12 24 POR 23 BOOST 22 TGL 21 SW 20 TGS 19 VIN 18 INTVCC 17 BG 16 PGND 15 EXTVCC 14 AUXDR 13 AUXFB
PLL LPF 1 COSC 2 RUN/SS 3 ITH 4 SFB 5 SGND 6 VPROG 7 VOSENSE 8 SENSE - 9 SENSE + 10 AUXON 11 AUXFB 12
GN PACKAGE 24-LEAD PLASTIC SSOP (150 MIL SSOP)
GN PACKAGE 24-LEAD PLASTIC SSOP (150 MIL SSOP)
TJMAX = 125C, JA = 110C/W
TJMAX = 125C, JA = 110C/W
ORDER PART NUMBER LTC1436ACGN LTC1436AIGN
Consult factory for Military grade parts.
ORDER PART NUMBER LTC1436ACGN-PLL LTC1436AIGN-PLL
ELECTRICAL CHARACTERISTICS
SYMBOL IIN VOSENSE VOUT PARAMETER Feedback Current Regulated Output Voltage 1.19V (Adjustable) Selected 3.3V Selected 5V Selected Main Control Loop
TA = 25C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
MIN TYP 10
q q q
CONDITIONS VPROG Pin Open (Note 2) (Note 2) VPROG Pin Open VPROG = 0V VPROG = INTVCC
2
U
U
W
WW U
W
TOP VIEW 24 PLLIN 23 POR 22 BOOST 21 TGL 20 SW 19 TGS 18 VIN 17 INTVCC 16 BG 15 PGND 14 EXTVCC 13 AUXDR
PLL LPF 1 COSC 2 RUN/SS 3 LBO 4 LBI 5 ITH 6 SFB 7 SGND 8 VPROG 9 VOSENSE 10 NC 11 SENSE - 12 SENSE + 13 AUXON 14
TOP VIEW 28 PLLIN 27 POR 26 BOOST 25 TGL 24 SW 23 TGS 22 VIN 21 INTVCC 20 DRVCC 19 BG 18 PGND 17 EXTVCC 16 AUXDR 15 AUXFB G PACKAGE 28-LEAD PLASTIC SSOP
TJMAX = 125C, JA = 95C/W
ORDER PART NUMBER LTC1437ACG LTC1437AIG
MAX 50 1.202 3.380 5.100
UNITS nA V V V
1.178 3.220 4.900
1.19 3.30 5.00
LTC1436A LTC1436A-PLL/LTC1437A
ELECTRICAL CHARACTERISTICS
SYMBOL VLINEREG VLOADREG VSFB ISFB VOVL IPROG PARAMETER Reference Voltage Line Regulation Output Voltage Load Regulation Secondary Feedback Threshold Secondary Feedback Current Output Overvoltage Lockout VPROG Input Current
TA = 25C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
MIN
q q q
CONDITIONS VIN = 3.6V to 20V (Note 2), VPROG Pin Open ITH Sinking 5A (Note 2) ITH Sourcing 5A (Note 2) VSFB Ramping Negative VSFB = 1.5V VPROG Pin Open 0.5V > VPROG INTVCC - 0.5V < VPROG < INTVCC
TYP 0.002 0.5 - 0.5
MAX 0.01 0.8 - 0.8 1.22 -2 1.32 -6 6
UNITS %/V % % V A V A A A A V A mV ns
1.16 1.24
1.19 -1 1.28 -3 3 280 16
IQ
Input DC Supply Current Normal Mode Shutdown RUN Pin Threshold Soft Start Current Source Minimum On-Time TGL Transition Time Rise Time Fall Time TGS Transition Time Rise Time Fall Time BG Transition Time Rise Time Fall Time Internal VCC Voltage INTVCC Load Regulation EXTVCC Voltage Drop EXTVCC Switchover Voltage Oscillator Frequency VCO High
EXTVCC = 5V (Note 3) 3.6V < VIN < 30V, VAUXON = 0V VRUN/SS = 0V, 3.6V < VIN < 15V
q
25 2 4.5 180 300
VRUN/SS IRUN/SS t ON(MIN)
0.8 1.5 130
1.3 3 150 250
VRUN/SS = 0V VOSENSE = 0V, 5V, VPROG Pin Open Tested with Square Wave, SENSE - = 1.6V, VSENSE = 20mV (Note 6) CLOAD = 3000pF CLOAD = 3000pF CLOAD = 500pF CLOAD = 500pF CLOAD = 3000pF CLOAD = 3000pF 6V < VIN < 30V, VEXTVCC = 4V IINTVCC = 15mA, VEXTVCC = 4V IINTVCC = 15mA, VEXTVCC = 5V IINTVCC = 15mA, VEXTVCC Ramping Positive COSC = 100pF, LTC1436 (Note 4), LTC1436A-PLL/LTC1437A, VPLLLPF = 0V LTC1436A-PLL/LTC1437A, VPLLLPF = 2.4V
q q
VSENSE(MAX) Maximum Current Sense Threshold
TGL t r TGL t f TGS t r TGS t f BG t r BG t f VINTVCC VLDO INT VLDO EXT VEXTVCC fOSC
50 50 90 50 50 40 4.8 5.0 - 0.2 130 4.5 112 200 4.7 125 240 50
150 150 200 150 150 150 5.2 -1 230
ns ns ns ns ns ns V % mV V
Internal VCC Regulator
Oscillator and Phase-Locked Loop 138 kHz kHz k 20 20 1 1 -4 A A V A % Cycles
RPLLIN IPLLLPF
PLL IN Input Resistance Phase Detector Output Current Sinking Capability Sourcing Capability POR Saturation Voltage POR Leakage POR Trip Voltage POR Delay fPLLIN < fOSC fPLLIN > fOSC IPOR = 1.6mA, VOSENSE = 1V, VPROG Pin Open VPOR = 12V, VOSENSE = 1.2V, VPROG Pin Open VPROG Pin Open, VOSENSE Ramping Negative VPROG Pin Open - 11 10 10
15 15 0.6 0.2 - 7.5 65536
Power-On Reset VSATPOR ILPOR VTHPOR t DPOR
3
LTC1436A LTC1436-PLL-A/LTC1437A
ELECTRICAL CHARACTERISTICS
SYMBOL VSATLBO ILLBO VTHLBI IINLBI VHYSLBO IAUXDR PARAMETER LBO Saturation Voltage LBO Leakage LBI Trip Voltage LBI Input Current LBO Hysteresis AUXDR Current Max Current Sinking Capability Control Current Leakage When Off AUXFB Input Current AUXON Input Current AUXON Trip Voltage AUXDR Saturation Voltage AUXFB Voltage AUXFB Divider Disconnect Voltage Low-Battery Comparator
TA = 25C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
MIN TYP 0.6
q q q
CONDITIONS ILBO = 1.6mA, VLBI = 1.1V VLBO = 12V, VLBI = 1.4V High to Low Transition on LBO VLBI = 1.19V
MAX 1 1 1.22 50
UNITS V A V nA mV
0.01 1.16 1.19 1 20
Auxiliary Regulator/Comparator VEXTVCC = 0V VAUXDR = 4V, VAUXFB = 1.0V, VAUXON = 5V VAUXDR = 5V, VAUXFB = 1.5V, VAUXON = 5V VAUXDR = 24V, VAUXFB = 1.5V, VAUXON = 0V VAUXFB = 1.19V, VAUXON = 5V VAUXON = 5V VAUXDR = 4V, VAUXFB = 1.0V IAUXDR = 1.6mA, VAUXFB = 1.0V, VAUXON = 5V VAUXON = 5V, 11V < VAUXDR < 24V (Note 5) VAUXON = 5V, 3V < VAUXDR < 7V (Note 5) VAUXON = 5V (Note 5), Ramping Negative
q q
10
15 1 0.01 0.01 0.01
5 1 1 1 1.4 0.8 12.5 1.24 9.5
mA A A A A V V V V V
IIN AUXFB IIN AUXON VTH AUXON VSAT AUXDR VAUXFB VTH AUXDR
1.0 11.5 1.14 7.5
1.19 0.4 12 1.19 8.5
The q denotes specifications which apply over the full operating temperature range. LTC1436ACGN/LTC1436ACGN-PLL/LTC1437ACG: 0C TA 70C LTC1436AIGN/LTC1436AIGN-PLL/LTC1437AIG: - 40C TA 85C Note 1: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LTC1436ACGN/LTC1436ACGN-PLL/LTC1436AIGN/ LTC1436AIGN-PLL: TJ = TA + (PD)(110 C/W) LTC1437ACG/LTC1437AIG: TJ = TA + (PD)(95 C/W) Note 2: The LTC1436A/LTC1437A are tested in a feedback loop which servos VOSENSE to the balance point for the error amplifier (VITH = 1.19V). Note 3: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information section.
Note 4: Oscillator frequency is tested by measuring the COSC charge and discharge currents and applying the formula: 8.4(108) 1 + 1 -1 fOSC (kHz) = C OSC (pF) + 11 ICHG IDIS Note 5: The Auxiliary Regulator is tested in a feedback loop which servos VAUXFB to the balance point for the error amplifier. For applications with VAUXDR > 9.5V, VAUXFB uses an internal resistive divider. See Applications Information. Note 6: The minimum on-time test condition corresponds to an inductor peak-to-peak ripple current 40% of IMAX (see Minimum On-Time Considerations in the Applications Information section).
(
)(
)
4
LTC1436A LTC1436A-PLL/LTC1437A TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage VOUT = 3.3V
100 VOUT = 3.3V 95 ILOAD = 1A EFFICIENCY (%) EFFICIENCY (%) 90 85 ILOAD = 100mA 80 75 70 90 ILOAD = 100mA 85 80 75 70 95 ILOAD = 1A
EFFICIENCY (%)
0
5
10 15 20 INPUT VOLTAGE (V)
VIN - VOUT Dropout Voltage vs Load Current
0.5 0 RSENSE = 0.033 VOUT DROP OF 5%
0.4
VIN - VOUT (V)
- 0.75 -1.00
VITH (V)
0.3
VOUT (%)
0.2
0.1
0 0 0.5 1.0 1.5 2.0 LOAD CURRENT (A) 2.5 3.0
1436 G04
Input Supply Current vs Input Voltage
2.5 100
0.5
2.0
SUPPLY CURRENT (mA)
EXTVCC - INTVCC (mV)
INTVCC (%)
1.5
VOUT = 5V EXTVCC = VOUT VOUT = 3.3V EXTVCC = OPEN
1.0
0.5 SHUTDOWN 0 0 5 10 15 20 INPUT VOLTAGE (V) 25
Burst Mode is a trademark of Linear Technology Corporation.
UW
25 30
1436 G01 1436 G07
Efficiency vs Input Voltage VOUT = 5V
100 VOUT = 5V
Efficiency vs Load Current
100 95 90 85 80 75 70 65 60 55 Adaptive Power MODE Burst ModeTM OPERATION VIN = 10V VOUT = 5V RSENSE = 0.033 CONTINUOUS MODE
0
5
10 15 20 INPUT VOLTAGE (V)
25
30
1436 G02
50 0.001
1 0.01 0.1 LOAD CURRENT (A)
10
1435 G03
Load Regulation
3.0
VITH Pin Voltage vs Output Current
RSENSE = 0.033
2.5 2.0 1.5 Burst Mode OPERATION 1.0 0.5 0 CONTINUOUS/Adaptive Power MODE
- 0.25 - 0.50
-1.25 -1.50 0 0.5 1.0 1.5 2.0 LOAD CURRENT (A) 2.5 3.0
1436 G05
0
10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (%)
1436 G06
INTVCC Regulation vs INTVCC Load Current
200
VEXTVCC = 0V
EXTVCC Switch Drop vs INTVCC Load Current
180 160 70C
80
SHUTDOWN CURRENT (A)
0.3 70C 0 25C - 0.3
140 120 100 80 60 40 20 25C - 55C
60
40
20
0 30
- 0.5
0
0 10 15 5 INTVCC LOAD CURRENT (mA) 20
1436 G08
0
2
4 6 8 10 12 14 16 18 20 INTVCC LOAD CURRENT (mA)
1436 G09
5
LTC1436A LTC1436-PLL-A/LTC1437A TYPICAL PERFORMANCE CHARACTERISTICS
Normalized Oscillator Frequency vs Temperature
10 4
RUN/SS CURRENT (A)
5
FREQUENCY (%)
SFB CURRENT (A)
fO
-5
-10 - 40 -15
60 35 85 10 TEMPERATURE (C)
Maximum Current Sense Threshold Voltage vs Temperature
154
CURRENT SENSE THRESHOLD (mV)
152 VOUT 50mV/DIV 150 VOUT 50mV/DIV
148 ILOAD = 50mA to 1A 146 - 40 -15
1436 G14
85 10 35 60 TEMPERATURE (C)
Burst Mode Operation
AUXILIARY OUTPUT VOLTAGE (V)
VOUT 20mV/DIV
VITH 200mV/DIV
ILOAD = 50mA
6
UW
110
1436 G10
RUN/SS Pin Current vs Temperature
0 - 0.25 3 -1.50 - 0.75 -1.00 -1.25 0 - 40 -15
SFB Pin Current vs Temperature
2
1
135
85 10 35 60 TEMPERATURE (C)
110
135
-1.50 - 40 -15
60 35 85 10 TEMPERATURE (C)
110
135
1436 G11
1436 G12
Transient Response
Transient Response
ILOAD = 1A to 3A
1436 G15
110
135
1436 G13
Soft Start: Load Current vs Time
12.2
Auxiliary Regulator Load Regulation
EXTERNAL PNP: 2N2907A
RUN/SS 5V/DIV INDUCTOR CURRENT 1A/DIV
12.1
12.0
11.9
11.8
1436 G16
1436 G17
11.7
0
40 120 160 80 AUXILIARY LOAD CURRENT (mA)
200
1436 G18
LTC1436A LTC1436A-PLL/LTC1437A TYPICAL PERFORMANCE CHARACTERISTICS
Auxiliary Regulator Sink Current Available
20
70 10mA LOAD 60
AUX DR CURRENT (mA)
15
50
PSRR (dB)
10
5
20
0 0 2 4 10 12 6 8 AUX DR VOLTAGE (V) 14 16
PIN FUNCTIONS
VIN: Main Supply Pin. Must be closely decoupled to the IC's signal ground pin. INTVCC: Output of the Internal 5V Regulator and EXTVCC Switch. The driver and control circuits are powered from this voltage. Must be closely decoupled to power ground with a minimum of 2.2F tantalum or electrolytic capacitor. DRVCC: Bottom MOSFET Driver Supply Voltage. EXTVCC: Input to the Internal Switch Connected to INTVCC. This switch closes and supplies VCC power whenever EXTVCC is higher than 4.7V. See EXTVCC connection in Applications Information section. Do not exceed 10V on this pin. Connect to VOUT if VOUT 5V. BOOST: Supply to Topside Floating Driver. The bootstrap capacitor is returned to this pin. Voltage swing at this pin is from INTVCC to VIN + INTVCC. SW: Switch Node Connection to Inductor. Voltage swing at this pin is from a Schottky diode (external) voltage drop below ground to VIN. SGND: Small Signal Ground. Must be routed separately from other grounds to the (-) terminal of COUT. PGND: Driver Power Ground. Connects to source of bottom N-channel MOSFET and the (-) terminal of CIN. SENSE -: The (-) Input to the Current Comparator. SENSE +: The (+) Input to the Current Comparator. Builtin offsets between SENSE - and SENSE + pins in conjunction with RSENSE set the current trip thresholds. VOSENSE: Receives the remotely sensed feedback voltage either from the output or from an external resistive divider across the output . The VPROG pin determines which point VOSENSE must connect to. VPROG: This voltage selects the output voltage. For VPROG < VINTVCC /3 the output is set to 3.3V with VOSENSE connected to the output. With VPROG > VINTVCC /1.5 the output is set to 5V with VOSENSE connected to the output. Leaving VPROG open (DC) allows the output voltage to be set by an external resistive divider connected to VOSENSE. COSC: External capacitor COSC from this pin to ground sets the operating frequency. ITH: Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 2.5V. RUN/SS: Combination of Soft Start and Run Control Inputs. A capacitor to ground at this pin sets the ramp time to full current output. The time is approximately 0.5s/F.
UW
Auxiliary Regulator PSRR
100mA LOAD 40 30
10 10
100 FREQUENCY (kHz)
1000
1436 G20
1436 G19
U
U
U
7
LTC1436A LTC1436-PLL-A/LTC1437A
PIN FUNCTIONS
Forcing this pin below 1.3V causes the device to be shut down. In shutdown all functions are disabled. TGL: High Current Gate Drive for Main Top N-Channel MOSFET. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. TGS: High Current Gate Drive for a Small Top N-Channel MOSFET. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. Leaving TGS open invokes Burst Mode operation at low load currents. BG: High Current Gate Drive for Bottom N-Channel MOSFET. Voltage swing at this pin is from ground to INTVCC (DRVCC). SFB: Secondary Winding Feedback Input. Normally connected to a feedback resistive divider from the secondary winding. This pin should be tied to: ground to force continuous operation; INTVCC in applications that don't use a secondary winding; and a resistive divider from the output in applications using a secondary winding. POR: Open Drain Output of an N-Channel Pull-Down. This pin sinks current when the output voltage is 7.5% out of regulation and releases 65536 oscillator cycles after the output voltage rises to - 5% of its regulated value. The POR output is asserted when Run/SS is low independent of VOUT. LBO: Open Drain Output of an N-Channel Pull-Down. This pin will sink current when the LBI pin goes below 1.19V. LBI: The (+) Input of the Low Battery Voltage Comparator. The (-) input is connected to a 1.19V reference. PLLIN: External Synchronizing Input to Phase Detector. This pin is internally terminated to SGND with 50k. Tie this pin to SGND in applications which do not use the phase-locked loop. PLL LPF: Output of Phase Detector and Control Input of Oscillator. Normally a series RC lowpass filter network is connected from this pin to ground. Tie this pin to SGND in applications which do not use the phase-locked loop. Can be driven by 0V to 2.4V logic signal for a frequency shifting option. AUXFB: Feedback Input to the Auxiliary Regulator/ Comparator. When used as a linear regulator, this input can either be connected to an external resistive divider or directly to the collector of the external PNP pass device for 12V operation. When used as a comparator, this is the noninverting input of a comparator whose inverting input is tied to the internal 1.19V reference. See Auxiliary Regulator/Comparator in Applications Information section. AUXON: Pulling this pin high turns on the auxiliary regulator/ comparator. The threshold is 1.19V. AUXDR: Open Drain Output of the Auxiliary Regulator/ Comparator. The base of an external PNP device is connected to this pin for use as a linear regulator. An external pull-up resistor is required for use as a comparator. A voltage > 9.5V on AUXDR causes the internal 12V resistive divider to be connected to AUXFB.
8
U
U
U
RLP COSC CLP VIN
AUXON 2.4V 50k 1A DB
AUXDR CIN
POR PLLIN* COSC SFB PLL LPF*
VIN
+
INTVCC
AUXFB 1.19V PHASE DETECTOR OSC SHUTDOWN TGL PWR-ON RESET 1.10V OV S Q 1.28V 0.6V R SWITCH LOGIC TGS DROPOUT DETECTOR M3 9V CB M1
1.19V
- +
1.19V REF
BOOST
FUNCTIONAL DIAGRA U
+
90.8k
-
10k
+ + - + -
VFB SW
INTVCC
VPROG
-
VOSENSE
320k I2
VSEC D1
61k EA I1 1.19V gm = 1m INTVCC 180k SHUTDOWN
- - -
4k
CONNECTION FOR LTC1436A/LTC1436A-PLL INTVCC VIN
119k
+ +
+
+
CSEC DRVCC 5V LDO REF
SGND
+ -
4.8V 30k 8k
VOUT
+
CINTVCC
LBO** RUN/ SOFT START
3A
+ -
+
BG
M2
+
COUT
1.19V 6V
-
RUN/SS ITH CC DFB CSS RC PGND SENSE + SENSE - EXTVCC
LBI**
* LTC1436A-PLL/LTC1437A ONLY ** LTC1436A/LTC1437A ONLY FOLDBACK CURRENT LIMITING OPTION
RSENSE
1436 FD
W LTC1436A LTC1436A-PLL/LTC1437A
COUT2
AUX
+
U
12V OUT
9
LTC1436A LTC1436-PLL-A/LTC1437A
OPERATIO
Main Control Loop The LTC1436A/LTC1437A use a constant frequency, current mode step-down architecture. During normal operation, the top MOSFET is turned on each cycle when the oscillator sets the RS latch and turned off when the main current comparator I1 resets the RS latch. The peak inductor current at which I1 resets the RS latch is controlled by the voltage on ITH pin, which is the output of error amplifier EA. VPRGM and VOSENSE pins, described in the Pin Functions, allow EA to receive an output feedback voltage VFB from either internal or external resistive dividers. When the load current increases, it causes a slight decrease in VFB relative to the 1.19V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by current comparator I2, or the beginning of the next cycle. The top MOSFET drivers are biased from floating bootstrap capacitor CB, which normally is recharged during each off cycle. However, when VIN decreases to a voltage close to VOUT, the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector counts the number of oscillator cycles that the top MOSFET remains on, and periodically forces a brief off period to allow CB to recharge. The main control loop is shut down by pulling RUN/SS pin low. Releasing RUN/SS allows an internal 3A current source to charge soft start capacitor CSS. When CSS reaches 1.3V, the main control loop is enabled with the ITH voltage clamped at approximately 30% of its maximum value. As CSS continues to charge, ITH is gradually released allowing normal operation to resume. Comparator OV guards against transient overshoots > 7.5% by turning off the top MOSFET and keeping it off until the fault is removed. Low Current Operation Adaptive Power mode allows the LTC1436A/LTC1437A to automatically change between two output stages sized for different load currents. TGL and BG pins drive large synchronous N-channel MOSFETs for operation at high currents, while the TGS pin drives a much smaller
10
U
(Refer to Functional Diagram)
N-channel MOSFET used in conjunction with a Schottky diode for operation at low currents. This allows the loop to continue to operate at normal frequency as the load current decreases without incurring the large MOSFET gate charge losses. If the TGS pin is left open, the loop defaults to Burst Mode operation in which the large MOSFETs operate intermittently based on load demand. Adaptive Power mode provides constant frequency operation down to approximately 1% of rated load current. This results in an order of magnitude reduction of load current before Burst Mode operation commences. Without the small MOSFET (i.e.: no Adaptive Power mode), the transition to Burst Mode operation is approximately 10% of rated load current. The transition to low current operation begins when comparator I2 detects current reversal and turns off the bottom MOSFET. If the voltage across RSENSE does not exceed the hysteresis of I2 (approximately 20mV) for one full cycle, then on following cycles the top drive is routed to the small MOSFET at TGS pin and BG pin is disabled. This continues until an inductor current peak exceeds 20mV/ RSENSE or the ITH voltage exceeds 0.6V, either of which causes drive to be returned to TGL pin on the next cycle. Two conditions can force continuous synchronous operation, even when the load current would otherwise dictate low current operation. One is when the common mode voltage of the SENSE + and SENSE - pins is below 1.4V and the other is when the SFB pin is below 1.19V. The latter condition is used to assist in secondary winding regulation as described in the Applications Information section. Frequency Synchronization A Phase-locked loop (PLL) is available on the LTC1436A-PLL and LTC1437A to allow the oscillator to be synchronized to an external source connected to the PLLIN pin. The output of the phase detector at the PLL LPF pin is also the control input of the oscillator, which operates over a 0V to 2.4V range corresponding to - 30% to 30% in frequency. When locked, the PLL aligns the turnon of the top MOSFET to the rising edge of the synchronizing signal. When PLLIN is left open or at a constant DC voltage, PLL LPF goes low, forcing the oscillator to minimum frequency.
LTC1436A LTC1436A-PLL/LTC1437A
OPERATIO
Power-On Reset
The POR pin is an open drain output which pulls low when the main regulator output voltage is out of regulation. When the output voltage rises to within 7.5% of regulation, a timer is started which releases POR after 216 (65536) oscillator cycles. In shutdown, the POR output is pulled low. Auxiliary Linear Regulator The auxiliary linear regulator in the LTC1436A/LTC1437A controls an external PNP transistor for operation up to 500mA. An internal AUXFB resistive divider set for 12V operation is invoked when AUXDR pin is above 9.5V to allow 12V VPP supplies to be easily implemented. When AUXDR is below 8.5V an external feedback divider may be used to set other output voltages. Taking the AUXON pin low shuts down the auxiliary regulator providing a convenient logic controlled power supply.
APPLICATIONS INFORMATION
The basic LTC1436A application circuit is shown in Figure 1, High Efficiency Step-Down Converter. External component selection is driven by the load requirement, and begins with the selection of RSENSE. Once RSENSE is known, COSC and L can be chosen. Next, the power MOSFETs and D1 are selected. Finally, CIN and COUT are selected. The circuit shown in Figure 1 can be configured for operation up to an input voltage of 28V (limited by the external MOSFETs). RSENSE Selection For Output Current RSENSE is chosen based on the required output current. The LTC1436A/LTC1437A current comparator has a maximum threshold of 150mV/RSENSE and an input common mode range of SGND to INTVCC. The current comparator threshold sets the peak of the inductor current, yielding a maximum average output current IMAX equal to the peak value less half the peak-to-peak ripple current IL. Allowing a margin for variations in the LTC1436A/ LTC1437A and external component values yields:
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(Refer to Functional Diagram)
The AUX block can be used as a comparator having its inverting input tied to the internal 1.19V reference. The AUXDR pin is used as the output and requires an external pull-up to a supply less than 8.5V in order to inhibit the invoking of the internal resistive divider. INTVCC /DRVCC /EXTVCC Power Power for the top and bottom MOSFET drivers and most of the other LTC1436A/LTC1437A circuitry is derived from the INTVCC pin. The bottom MOSFET driver supply DRVCC pin is internally connected to INTVCC in the LTC1436A and externally connected to INTVCC in the LTC1437A. When the EXTVCC pin is left open, an internal 5V low dropout regulator supplies INTVCC power. If EXTVCC is taken above 4.8V, the 5V regulator is turned off and an internal switch is turned on to connect EXTVCC to INTVCC. This allows the INTVCC power to be derived from a high efficiency external source such as the output of the regulator itself or a secondary winding, as described in the Applications Information section.
RSENSE =
100mV IMAX
The LTC1436A/LTC1437A work well with RSENSE values 0.005. COSC Selection for Operating Frequency The LTC1436A/LTC1437A use a constant frequency architecture with the frequency determined by an external oscillator capacitor COSC. Each time the topside MOSFET turns on, the voltage on COSC is reset to ground. During the on-time, COSC is charged by a fixed current plus an additional current which is proportional to the output voltage of the phase detector VPLLLPF (LTC1436A-PLL/ LTC1437A). When the voltage on the capacitor reaches 1.19V, COSC is reset to ground. The process then repeats. The value of COSC is calculated from the desired operating frequency. Assuming the phase-locked loop has no external oscillator input (VPLLLPF = 0V):
11
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
4 1.37(10 ) COSC pF = Frequency kHz - 11
()
()
A graph for selecting COSC vs frequency is given in Figure 2. As the operating frequency is increased the gate charge losses will be higher, reducing efficiency (see Efficiency Considerations). The maximum recommended switching frequency is 400kHz. When using Figure 2 for synchronizable applications, choose COSC corresponding to a frequency approximately 30% below your center frequency. (See Phase-Locked Loop and Frequency Synchronization.)
300 VPLLLPF = 0V 250
COSC VALUE (pF)
200 150 100
50
50 INDUCTOR VALUE (H)
0
0
100 200 300 400 OPERATING FREQUENCY (kHz)
500
1436 F02
Figure 2. Timing Capacitor Value
Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. So why would anyone ever choose to operate at lower frequencies with larger components? The answer is efficiency. A higher frequency generally results in lower efficiency because of MOSFET gate charge losses. In addition to this basic trade-off, the effect of inductor value on ripple current and low current operation must also be considered. The inductor value has a direct effect on ripple current. The inductor ripple current IL decreases with higher inductance or frequency and increases with higher VIN or VOUT:
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IL =
( )( )
V 1 VOUT 1 - OUT VIN fL
Accepting larger values of IL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is IL = 0.4 (IMAX). Remember, the maximum IL occurs at the maximum input voltage. The inductor value also has an effect on low current operation. The transition to low current operation begins when the inductor current reaches zero while the bottom MOSFET is on. Lower inductor values (higher IL) will cause this to occur at higher load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation (TGS pin open), lower inductance values will cause the burst frequency to decrease. The Figure 3 graph gives a range of recommended inductor values vs operating frequency and VOUT.
60 VOUT = 5V VOUT = 3.3V VOUT 2.5V
40 30 20 10 0 0 250 100 150 200 50 OPERATING FREQUENCY (kHz) 300
1436 F03
Figure 3. Recommended Inductor Values
For low duty cycle, high frequency applications where the required minimum on-time,
tON(MIN) =
(VIN(MAX))(f)
VOUT
is less than 350ns, there may be further restrictions on the inductance to ensure proper operation. See Minimum OnTime Considerations section for more details.
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy, or Kool M(R) cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core loss and are prefered at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard," which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool M. Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, designs for surface mount are available which do not increase the height significantly. Power MOSFET and D1 Selection Three external power MOSFETs must be selected for use with the LTC1436A/LTC1437A: a pair of N-channel MOSFETs for the top (main) switch and an N-channel MOSFET for the bottom (synchronous) switch. To take advantage of the Adaptive Power output stage, two topside MOSFETs must be selected. A large (low RSD(ON)) MOSFET and a small (higher RDS(ON)) MOSFET are required. The large MOSFET is used as the main switch and works in conjunction with the synchronous switch. The smaller MOSFET is only enabled under low load current conditions. This increases midcurrent efficiencies while continuing to operate at constant frequency. Also, by using the small MOSFET the circuit can maintain constant
Kool M is a registered trademark of Magnetics, Inc.
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frequency operation down to lower currents before cycle skipping occurs. The RDS(ON) recommended for the small MOSFET is around 0.5. Be careful not to use a MOSFET with an RDS(ON) that is too low; remember, we want to conserve gate charge. (A higher RDS(ON) MOSFET has a smaller gate capacitance and thus requires less current to charge its gate). For cost sensitive applications the small MOSFET can be removed. The circuit will then begin Burst Mode operation as the load current is dropped. The peak-to-peak gate drive levels are set by the INTVCC voltage. This voltage is typically 5V during start-up (see EXTVCC Pin Connection). Consequently, logic level threshold MOSFETs must be used in most LTC1436A/ LTC1437A applications. The only exception is applications in which EXTVCC is powered from an external supply greater than 8V (must be less than 10V), in which standard threshold MOSFETs [VGS(TH) < 4V] may be used. Pay close attention to the BVDSS specification for the MOSFETs as well; many of the logic level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the "ON" resistance RSD(ON), reverse transfer capacitance CRSS, input voltage and maximum output current. When the LTC1436A/LTC1437A are operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle =
VOUT VIN
Synchronous Switch Duty Cycle =
(V
IN - VOUT
)
VIN
The MOSFET power dissipations at maximum output current are given by:
2 V PMAIN = OUT IMAX 1 + R DS(ON) VIN
( )( )
( ) (IMAX )(CRSS)(f) 2 V -V PSYNC = IN OUT (IMAX ) (1 + )R DS (ON) VIN
+ k VIN
1.85
13
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
where is the temperature dependency of RDS(ON) and k is a constant inversely related to the gate drive current. Both MOSFETs have I2R losses while the topside N-channel equation includes an additional term for transition losses, which are highest at high input voltages. For VIN < 20V the high current efficiency generally improves with larger MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON) device with lower CRSS actual provides higher efficiency. The synchronous MOSFET losses are greatest at high input voltage or during a short circuit when the duty cycle in this switch is nearly 100%. Refer to the Foldback Current Limiting section for further applications information. The term (1 + ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs temperature curve, but = 0.005/C can be used as an approximation for low voltage MOSFETs. CRSS is usually specified in the MOSFET characteristics. The constant k = 2.5 can be used to estimate the contributions of the two terms in the main switch dissipation equation. The Schottky diode D1 shown in Figure 1 serves two purposes. During continuous synchronous operation, D1 conducts during the dead-time between the conduction of the two large power MOSFETs. This prevents the body diode of the bottom MOSFET from turning on and storing charge during the dead-time, which could cost as much as 1% in efficiency. During low current operation, D1 operates in conjunction with the small top MOSFET to provide an efficient low current output stage. A 1A Schottky is generally a good compromise for both regions of operation due to the relatively small average current. CIN and COUT Selection In continuous mode, the source current of the top N-channel MOSFET is a square wave of duty cycle VOUT/ VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer's ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisified, the capacitance is adequate for filtering. The output ripple (VOUT) is approximated by:
CIN Required IRMS IMAX
[(
VOUT VIN - VOUT VIN
)]
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1 VOUT IL ESR + 4fCOUT
where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since IL increases with input voltage. With IL = 0.4IOUT(MAX) the output ripple will be less than 100mV at maximum VIN, assuming: COUT Required ESR < 2RSENSE Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. Other capacitor types
1/ 2
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
include Sanyo OS-CON, Nichicon PL series and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. INTVCC Regulator An internal P-channel low dropout regulator produces the 5V supply that powers the drivers and internal circuitry within the LTC1436A/LTC1437A. The INTVCC pin can supply up to 15mA and must be bypassed to ground with a minimum of 2.2F tantalum or low ESR electrolytic. Good bypassing is necessary to supply the high transient currents required by the MOSFET gate drivers. High input voltage applications, in which large MOSFETs are being driven at high frequencies, may cause the maximum junction temperature rating for the LTC1436A/ LTC1437A to be exceeded. The IC supply current is dominated by the gate charge supply current when not using an output derived EXTVCC source. The gate charge is dependent on operating frequency as discussed in the Efficiency Considerations section. The junction temperature can be estimated by using the equations given in Note 1 of the Electrical Characteristics. For example, the LTC1437A is limited to less than 19mA from a 30V supply: factor of Duty Cycle/Efficiency. For 5V regulators this supply means connecting the EXTVCC pin directly to VOUT. However, for 3.3V and other lower voltage regulators, additional circuitry is required to derive INTVCC power from the output. The following list summarizes the four possible connections for EXTVCC: 1. EXTVCC left open (or grounded). This will cause INTVCC to be powered from the internal 5V regulator resulting in an efficiency penalty of up to 10% at high input voltages. 2. EXTVCC connected directly to VOUT. This is the normal connection for a 5V regulator and provides the highest efficiency. 3. EXTVCC connected to an output-derived boost network. For 3.3V and other low voltage regulators, efficiency gains can still be realized by connecting EXTVCC to an output-derived voltage which has been boosted to greater than 4.8V. This can be done with either the inductive boost winding as shown in Figure 4a or the capacitive charge pump shown in Figure 4b. The charge pump has the advantage of simple magnetics. 4. EXTVCC connected to an external supply. If an external supply is available in the 5V to 10V range (EXTVCC < VIN), it may be used to power EXTVCC, providing it is compatible with the MOSFET gate drive requirements. When driving standard threshold MOSFETs, the external supply must always be present during operation to prevent MOSFET failure due to insufficient gate drive.
OPTIONAL EXTVCC CONNECTION 5V VSEC 9V LTC1436A VIN LTC1437A TGL EXTVCC R6 SFB R5 SGND BG PGND
1436 F04a
TJ = 70C + 19mA 30V 95C / W = 124C
To prevent maximum junction temperature from being exceeded, the input supply current must be checked when operating in continuous mode at maximum VIN. EXTVCC Connection The LTC1436A/LTC1437A contain an internal P-channel MOSFET switch connected between the EXTVCC and INTVCC pins. The switch closes and supplies the INTVCC power whenever the EXTVCC pin is above 4.8V, and remains closed until EXTVCC drops below 4.5V. This allows the MOSFET driver and control power to be derived from the output during normal operation (4.8V < VOUT < 9V) and from the internal regulator when the output is out of regulation (start-up, short circuit). Do not apply greater than 10V to the EXTVCC pin and ensure that EXTVCC < VIN. Significant efficiency gains can be realized by powering INTVCC from the output, since the VIN current resulting from the driver and control currents will be scaled by a
(
)( )(
)
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+
CIN
VIN 1N4148 T1 1:N RSENSE VSEC
+
1F VOUT COUT
N-CH N-CH
TGS SW
+
N-CH
Figure 4a. Secondary Output Loop and EXTVCC Connection
15
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
+
CIN LTC1436A VIN LTC1437A TGL EXTVCC TGS SW BG PGND
1436 F04b
VIN BAT85
+
1F 0.22F BAT85
N-CH N-CH L1
VN2222LL RSENSE
N-CH
1.19V VOUT 9V VPROG OPEN (DC) R2
Figure 4b. Capacitive Charge Pump for EXT VCC
Topside MOSFET Driver Supply (CB, DB) An external bootstrap capacitor CB connected to the Boost pin supplies the gate drive voltage for the topside MOSFET(s). Capacitor CB in the functional diagram is charged through diode DB from INTVCC when the SW pin is low. When one of the topside MOSFET(s) is to be turned on, the driver places the CB voltage across the gate source of the desired MOSFET. This enhances the MOSFET and turns on the topside switch. The switch node voltage SW rises to VIN and the Boost pin rises to VIN + INTVCC. The value of the boost capacitor CB needs to be 100 times greater than the total input capacitance of the topside MOSFET(s). In most applications 0.1F is adequate. The reverse breakdown on DB must be greater than VIN(MAX). Output Voltage Programming The output voltage is pin selectable for all members of the LTC1436A/LTC1437A family. The output voltage is selected by the VPROG pin as follows: VPROG = 0V VPROG = INTVCC VPROG = Open (DC) VOUT = 3.3V VOUT = 5V VOUT = Adjustable
The LTC1436A/LTC1437A family also has remote output voltage sense capability. The top of an internal resistive divider is connected to VOSENSE. For fixed 3.3V and 5V output voltage applications the VOSENSE pin is connected to the output voltage as shown in Figure 5a. When using an external resistive divider, the VPROG pin is left open (DC) and the VOSENSE pin is connected to the feedback resistors as shown in Figure 5b.
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VPROG V LTC1436A OSENSE LTC1437A
GND: VOUT = 3.3V INTVCC: VOUT = 5V
+
COUT
VOUT
BAT85
SGND
1436 F05a
COUT
Figure 5a. LTC1436A/LTC1437A Fixed Output Applications
LTC1436A LTC1437A
VOSENSE 100pF SGND R1
VOUT = 1.19V 1 +
()
R2 R1
1436 F05b
Figure 5b. LTC1436A/LTC1437A Adjustable Applications
Power-On Reset Function (POR) The power-on reset function monitors the output voltage and turns on an open drain device when it is out of regulation. An external pull-up resistor is required on the POR pin. When power is first applied or when coming out of shutdown, the POR output is pulled to ground. When the output voltage rises above a level which is 5% below the final regulated output value, an internal counter starts. After counting 216 (65536) clock cycles, the POR pulldown device turns off. The POR output will go low whenever the output voltage drops below 7.5% of its regulated value for longer than approximately 30s, signaling an out-of-regulation condition. In shutdown, the POR output is pulled low even if the regulator's output is held up by an external source. Run/Soft Start Function The RUN/SS pin is a dual purpose pin that provides the soft start function and a means to shut down the LTC1436A/LTC1437A. Soft start reduces surge currents from VIN by gradually increasing the internal current limit. Power supply sequencing can also be accomplished using this pin.
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
An internal 3A current source charges up an external capacitor CSS. When the voltage on RUN/SS reaches 1.3V the LTC1436A/LTC1437A begin operating. As the voltage on RUN/SS continues to ramp from 1.3V to 2.4V, the internal current limit is also ramped at a proportional linear rate. The current limit begins at approximately 50mV/ RSENSE (at VRUN/SS = 1.3V) and ends at 150mV/RSENSE (VRUN/SS > 2.7V). The output current thus ramps up slowly, charging the output capacitor. If RUN/SS has been pulled all the way to ground there is a delay before starting of approximately 500ms/F, followed by an additional 500ms/F to reach full current. tDELAY = 5(105)CSS seconds Pulling the RUN/SS pin below 1.3V puts the LTC1436A/ LTC1437A into a low quiescent current shutdown (IQ < 25A). This pin can be driven directly from logic as shown in Figure 6. Diode D1 in Figure 6 reduces the start delay but allows CSS to ramp up slowly for the soft start function; this diode and CSS can be deleted if soft start is not needed. The RUN/SS pin has an internal 6V Zener clamp (see Functional Diagram).
3.3V OR 5V D1 RUN/SS RUN/SS
CSS
CSS
1436 F06
Figure 6. Run/SS Pin Interfacing
Foldback Current Limiting As described in Power MOSFET and D1 Selection, the worst-case dissipation for either MOSFET occurs with a short-circuited output, when the synchronous MOSFET conducts the current limit value almost continuously. In most applications this will not cause excessive heating, even for extended fault intervals. However, when heat sinking is at a premium or higher RDS(ON) MOSFETs are being used, foldback current limiting should be added to reduce the current in proportion to the severity of the fault.
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Foldback current limiting is implemented by adding a diode DFB between the output and ITH pins as shown in the Function Diagram. In a hard short (VOUT = 0V), the current will be reduced to approximately 25% of the maximum output current. This technique may be used for all applications with regulated output voltages of 1.8V or greater. Phase-Locked Loop and Frequency Synchronization The LTC1436A-PLL/LTC1437A each have an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the top MOSFET turn-on to be locked to the rising edge of an external source. The frequency range of the voltage-controlled oscillator is 30% around the center frequency fO. The value of COSC is calculated from the desired operating frequency fO. Assuming the phase-locked loop is locked (VPLLLPF = 1.19V):
2.1(104 ) COSC pF = Frequency kHz
()
()
- 11
Stating the frequency as a function of VPLLLPF and COSC: Frequency kHz = 8.4(108 ) 1 COSC pF + 11 + 2000 V 17A + 18A PLLLPF 2.4V
()
[ () ]
The phase detector used is an edge sensitive digital type which provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the harmonics of the VCO center frequency. The PLL hold-in range fH is equal to the capture range: fH = fC = 0.3fO.
17
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
The output of the phase detector is a complementary pair of current sources charging or discharging the external filter network on the PLL LPF pin. The relationship between the PLL LPF pin and operating frequency is shown in Figure 7. A simplified block diagram is shown in Figure 8. If the external frequency (fPLLIN) is greater than the oscillator frequency (f), current is sourced continuously, pulling up the PLL LPF pin. When the external frequency is less than fOSC, current is sunk continuously, pulling down the PLL LPF pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference. Thus the voltage on the PLL LPF pin is adjusted until the phase and frequency of the external and internal oscillators are identical. At this stable operating point the phase comparator output is open and the filter capacitor CLP holds the voltage. The loop filter components CLP and RLP smooth out the current pulses from the phase detector and provide a stable input to the voltage-controlled oscillator. The filter components CLP and RLP determine how fast the loop acquires lock. Typically, RLP = 10k and CLP is 0.01F to 0.1F. Be sure to connect the low side of the filter to SGND. The PLL LPF pin can be driven with external logic to obtain a 1:1.9 frequency shift. The circuit shown in Figure 9 will provide a frequency shift from fO to 1.9fO as the voltage and VPLLLPF increases from 0V to 2.4V. Do not exceed 2.4V on VPLLLPF.
3.3V OR 5V PLL LPF
1.3fO
FREQUENCY (kHz)
fO
0.7fO
1436 F09
0
0.5
1.0 1.5 VPLLLPF (V)
2.0
2.5
1436 F07
Figure 7. Operating Frequency vs VPLLLPF
EXTERNAL FREQUENCY 2.4V PHASE DETECTOR PLLIN
RLP CLP COSC
PLL LPF
50k
DIGITAL PHASE/ FREQUENCY DETECTOR
OSC
1436 F08
Figure 8. Phase-Locked Loop Block Diagram
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2.4V MAX
18k
Figure 9. Directly Driving PLL LPF Pin
Low-Battery Comparator The LTC1436A/LTC1437A have an on-chip low-battery comparator which can be used to sense a low-battery condition when implemented as shown in Figure 10. The resistive divider R3, R4 sets the comparator trip point as follows:
R4 VLBTRIP = 1.19V 1 + R3
VIN R4 LBI R3 SGND LTC1436A LTC1437A LBO
COSC
- +
1.19V REFERENCE
1436 F10
Figure 10. Low Battery Comparator
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
The divided down voltage at the negative (-) input to the comparator is compared to an internal 1.19V reference. A 20mV hysteresis is built in to assure rapid switching. The output is an open drain MOSFET and requires a pull-up resistor. This comparator is not active in shutdown. The low side of the resistive divider should connect to SGND. SFB Pin Operation When the SFB pin drops below its ground-referenced 1.19V threshold, continuous mode operation is forced. In continuous mode, the large N-channel main and synchronous switches are used regardless of the load on the main output. In addition to providing a logic input to force continuous synchronous operation, the SFB pin provides a means to regulate a flyback winding output. Continuous synchronous operation allows power to be drawn from the auxiliary windings without regard to the primary output load. The SFB pin provides a way to force continuous synchronous operation as needed by the flyback winding. The secondary output voltage is set by the turns ratio of the transformer in conjunction with a pair of external resistors returned to the SFB pin as shown in Figure 4a. The secondary regulated voltage VSEC in Figure 4a is given by: excess current is drawn when the input stage is overdriven when used as a comparator. The AUXDR pin is internally connected to an open drain MOSFET which can sink up to 10mA. The voltage on AUXDR determines whether or not an internal 12V resistive divider is connected to AUXFB as described below. A pull-up resistor is required on AUXDR and the voltage must not exceed 28V. With the addition of an external PNP pass device, a linear regulator capable of supplying up to 0.5A is created. As shown in Figure 12a, the base of the external PNP connects to the AUXDR pin together with a pull-up resistor. The output voltage VOAUX at the collector of the external PNP is sensed by the AUXFB pin. The input voltage to the auxiliary regulator can be taken from a secondary winding on the primary inductor as shown in Figure 11a. In this application, the SFB pin regulates the input voltage to the PNP regulator (see SFB Pin Operation) and should be set to approximately 1V to 2V above the required output voltage of the auxiliary regulator. A Zener diode clamp may be required to keep VSEC under the 28V AUXDR pin specification when the primary is heavily loaded and the secondary is not. The AUXFB pin is the feedback point of the regulator. An internal resistive divider is available to provide a 12V output by simply connecting AUXFB directly to the collector of the external PNP. The internal resistive divider is selected when the voltage at AUXFB goes above 9.5V with 1V built-in hysteresis. For other output voltages, an external resistive divider is fed back to AUXFB as shown in Figure 11b. The output voltage VOAUX is set as follows: VOAUX = 1.19V(1+R8/R7) < 8V VOAUX = 12V AUXDR < 8.5V AUXDR > 12V
R6 VSEC N + 1 VOUT > 1.19V 1 + R5
()
where N is the turns ratio of the transformer and VOUT is the main output voltage sensed by VOSENSE. Auxiliary Regulator/Comparator The auxiliary regulator/comparator can be used as a comparator or low dropout regulator (by adding an external PNP pass device). When the voltage present at the AUXON pin is greater than 1.19V the regulator/comparator is on. Special circuitry consumes a small (20 A) bias current while still remaining stable when operating as a low dropout regulator. No
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The circuit can also be used as a noninverting voltage comparator as shown in Figure 11c. When AUXFB drops below 1.19V, the AUXDR pin will be pulled low. A minimum current of 5A is required to pull the AUXDR pin to 5V when used as a comparator output, in order to counteract a 1.5A internal current source.
19
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
1:N SECONDARY WINDING
VSEC
+
R6
LTC1436A LTC1437A AUXDR SFB AUXFB AUXON ON/OFF
R5
+
10F
VSEC = 1.19V 1 +
()
R6 > 13V R5
Figure 11a. 12V Output Auxiliary Regulator Using Internal Feedback Resistors
1:N SECONDARY WINDING
VOAUX = 1.19V 1 + VSEC LTC1436A LTC1437A SFB R5
+
R6
AUXDR AUXFB AUXON ON/OFF
R8
R7
VSEC = 1.19V 1 +
()
R6 R5
Figure 11b. 5V Output Auxiliary Regulator Using External Feedback Resistors
VPULL-UP < 8.5V ON/OFF INPUT AUXON AUXFB LTC1436A LTC1437A
AUXDR
MINIMUM ON-TIME (ns)
- +
1.19V REFERENCE
OUTPUT
1436 F11c
Figure 11c. Auxiliary Comparator Configuration
Minimum On-Time Considerations Minimum on-time, tON(MIN), is the smallest amount of time that the LTC1436A/LTC1437A are capable of turning the top MOSFET on and off again. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit. If the duty cycle falls below what can be accommodated by the minimum on-time, the LTC1436A/LTC1437A will begin to skip cycles. The output voltage will continue to be regulated, but the ripple current and ripple voltage will increase. Therefore this limit should be avoided.
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VOAUX 12V
The minimum on-time for the LTC1436A/LTC1437A in a properly configured application is less than 300ns but increases at low ripple current amplitudes (see Figure 12). If an application is expected to operate close to the minimum on-time limit, an inductor value must be chosen that is low enough to provide sufficient ripple amplitude to meet the minimum on-time requirement. To determine the proper value, use the following procedure: 1. Calculate on-time at maximum supply, tON(MIN) = (1/f)(VOUT/VIN(MAX)). 2. Use Figure 12 to obtain the peak-to-peak inductor ripple current as a percentage of IMAX necessary to achieve the calculated tON(MIN). 3. Ripple amplitude IL(MIN) = (% from Figure 12) (IMAX) where IMAX = 0.1/RSENSE.
1436 F11a
()
R8 R7 VOAUX
10F
VIN(MAX ) - VOUT 4. LMAX = tON(MIN) IL(MIN)
Choose an inductor less than or equal to the calculated LMAX to ensure proper operation.
400
1436 F11b
350 RECOMMENDED REGION FOR MIN ON-TIME AND MAX EFFICIENCY
300
250
200 0 50 60 70 10 20 30 40 INDUCTOR RIPPLE CURRENT (% OF IMAX)
1435A F12
Figure 12. Minimum On-Time vs Inductor Ripple Current
Because of the sensitivity of the LTC1436A/LTC1437A current comparator when operating close to the minimum on-time limit, it is important to prevent stray magnetic flux generated by the inductor from inducing noise on the current sense resistor, which may occur when axial type cores are used. By orienting the sense resistor on the radial axis of the inductor (see Figure 13), this noise will be minimized.
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
INDUCTOR L
1435A F08
Figure 13. Allowable Inductor/RSENSE Layout Orientations
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1436A/LTC1437A circuits: LTC1436A/ LTC1437A VIN current, INTVCC current, I2R losses and topside MOSFET transition losses. 1. The VIN current is the DC supply current given in the Electrical Characteristics table which excludes MOSFET driver and control currents. VIN current results in a small (< 1%) loss which increases with VIN. 2. INTVCC current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from INTVCC to ground. The resulting dQ/dt is a current out of INTVCC that is typically much larger than the control circuit current. In continuous mode, IGATECHG = f(QT + QB), where QT and QB are the gate charges of the topside and bottom side MOSFETs. It is for this reason that the Adaptive Power output stage switches to a low QT MOSFET during low current operation. By powering EXTVCC from an output-derived source, the additional VIN current resulting from the driver and control currents will be scaled by a factor of Duty Cycle/
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Efficiency. For example, in a 20V to 5V application, 10mA of INTVCC current results in approximately 3mA of VIN current. This reduces the midcurrent loss from 10% or more (if the driver was powered directly from VIN) to only a few percent. 3. I2R losses are predicted from the DC resistances of the MOSFET, inductor and current shunt. In continuous mode the average output current flows through L and RSENSE, but is "chopped" between the topside main MOSFET and the synchronous MOSFET. If the two MOSFETs have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the resistances of L and RSENSE to obtain I2R losses. For example, if each RDS(ON) = 0.05, RL = 0.15 and RSENSE = 0.05, then the total resistance is 0.25. This results in losses ranging from 3% to 10% as the output current increases from 0.5A to 2A. I2R losses cause the efficiency to drop at high output currents. 4. Transition losses apply only to the topside MOSFET(s), and only when operating at high input voltages (typically 20V or greater). Transition losses can be estimated from: Transition Loss = 2.5(VIN)1.85(IMAX)(CRSS)(f) Other losses including CIN and COUT ESR dissipative losses, Schottky conduction losses during dead-time and inductor core losses, generally account for less than 2% total additional loss. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in DC (resistive) load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD)(ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing, which would indicate a stability problem. The ITH external components shown in the Figure 1 circuit will provide adequate compensation for most applications.
21
LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately 25(CLOAD). Thus a 10F capacitor would require a 250s rise time, limiting the charging current to about 200mA. Automotive Considerations: Plugging into the Cigarette Lighter As battery-powered devices go mobile, there is a natural interest in plugging into the cigarette lighter in order to conserve or even recharge battery packs during operation. But before you connect, be advised: you are plugging into the supply from hell. The main battery line in an automobile is the source of a number of nasty potential transients, including load dump, reverse battery, and double battery. Load dump is the result of a loose battery cable. When the cable breaks connection, the field collapse in the alternator can cause a positive spike as high as 60V which takes several hundred milliseconds to decay. Reverse battery is just what it says, while double battery is a consequence of tow-truck operators finding that a 24V jump start cranks cold engines faster than 12V. The network shown in Figure 14 is the most straightforward approach to protect a DC/DC converter from the ravages of an automotive battery line. The series diode prevents current from flowing during reverse battery, while the transient suppressor clamps the input voltage during load dump. Note that the transient suppressor
12V 50A IPK RATING VIN TRANSIENT VOLTAGE SUPPRESSOR GENERAL INSTRUMENT 1.5KA24A LTC1436A LTC1437A
1436 F14
Figure 14. Automotive Application Protection
22
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should not conduct during double battery operation, but must still clamp the input voltage below breakdown of the converter. Although the LTC1436A/LTC1437A have a maximum input voltage of 36V, most applications will be limited to 30V by the MOSFET BVDSS. Design Example As a design example, assume VIN = 12V (nominal), VIN = 22V (max), VOUT = 1.6V, IMAX = 3A and f = 250kHz, RSENSE and COSC can immediately be calculated:
RSENSE =
100mV = 0.033 3A 1.37(104 ) COSC = - 11 = 43pF 250
Refering to Figure 3, a 4.7H inductor falls within the recommended range. To check the actual value of the ripple current the following equation is used:
IL =
( )( )
VOUT VOUT 1 - V fL IN
The highest value of the ripple current occurs at the maximum input voltage:
IL = 1.6V 1 - 22V = 1.3A 250kHz 4 .7H 1.6V
(
)
The lowest duty cycle also occurs at maximum input voltage. The on-time during this condition should be checked to make sure it doesn't violate the LTC1436A/ LTC1437A's minimum on-time and cause cycle skipping to occur. The required on-time at VIN(MAX) is:
tON(MIN) =
(VIN(MAX) )(f)
VOUT
=
1.6V = 291ns (22V)(250kHz)
The IL was previously calculated to be 1.3A, which is 43% of IMAX. From Figure 12, the LTC1436A/LTC1437A's minimum on-time at 43% ripple is about 235ns. Therefore, the minimum on-time is sufficient and no cycle skipping will occur.
LTC1436A LTC1436A-PLL/LTC1437A
APPLICATIONS INFORMATION
The power dissipation on the topside MOSFET can be easily estimated. Choosing a Siliconix Si4412DY results in: RDS(ON) = 0.042, CRSS = 100pF. At maximum input voltage with T (estimated) = 50C: source of the bottom N-channel MOSFET, anode of the Schottky diode, and (-) plate of CIN, which should have as short lead lengths as possible. 2. Does the LTC1436A/LTC1437A VOSENSE pin connect to the (+) plate of COUT? In adjustable applications, the resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground. The 100pF capacitor should be as close as possible to the LTC1436A/ LTC1437A. 3. Are the SENSE - and SENSE + leads routed together with minimum PC trace spacing? The filter capacitor between SENSE + and SENSE - should be as close as possible to the LTC1436A/LTC1437A. 4. Does the (+) plate of CIN connect to the drain of the topside MOSFET(s) as closely as possible? This capacitor provides the AC current to the MOSFET(s). 5. Is the INTVCC decoupling capacitor connected closely between INTVCC and the power ground pin? This capacitor carries the MOSFET driver peak currents. 6. Keep the switching node SW away from sensitive smallsignal nodes. Ideally, the switch node should be placed at the furthest point from the LTC1436A/LTC1437A. 7. Route the PLLIN line away from Boost and SW pins to avoid unwanted pickup (Boost and SW pins have high dV/dTs). 8. SGND should be used exclusively for grounding external components on PLL LPF, COSC, ITH, LBI, SFB, VOSENSE and AUXFB pins. 9. If operating close to the minimum on-time limit, is the sense resistor oriented on the radial axis of the inductor? See Figure 13.
PMAIN =
+ 2.5(22V )
1.6V 2 (3) 1+ (0.005)(50C - 25C ) (0.042) 22V
1.85
[
]
(3A)(100pF )(250kHz) = 88mW
The most stringent requirement for the synchronous N-channel MOSFET occurs when VOUT = 0 (i.e. short circuit). In this case the worst-case dissipation rises to: PSYNC = ISC(AVG) 1 + RDS(ON) With the 0.033 sense resistor ISC(AVG) = 4A will result, increasing the Si4412DY dissipation to 950mW at a die temperature of 105C. CIN is chosen for an RMS current rating of at least 1.5A at temperature. COUT is chosen with an ESR of 0.03 for low output ripple. The output ripple in continuous mode will be highest at the maximum input voltage. The output voltage ripple due to ESR is approximately: VORIPPLE = RESR ( IL ) = 0.03 (1.3 A ) = 39 mVP- P
2
()
PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1436A/LTC1437A. These items are also illustrated graphically in the layout diagram of Figure 15. Check the following in your layout: 1. Are the signal and power grounds segregated? The LTC1436A/LTC1437A signal ground pin must return to the (-) plate of COUT. The power ground connects to the
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LTC1436A LTC1436-PLL-A/LTC1437A
APPLICATIONS INFORMATION
RLP COSC CSS
CLP 1 2 3 4 5 CC 6 PLL LPF COSC RUN/SS LBO LBI ITH SFB SGND VPROG VOSENSE NC SENSE - SENSE + LTC1437A PLLIN POR BOOST TGL SW TGS VIN INTVCC DRVCC BG PGND EXTVCC AUXDR AUXFB 28 27 26 25 24 23 22 21 20 19 18 17 16 15 5V EXT VCC CONNECTION L1 DB M3 D1 M1 EXT CLOCK
RC CC2
7 8
100pF
OPEN
9 10 11 12
1000pF
13
AUX 14 AUXON ON/OFF
R2
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 15. LTC1437A Layout Diagram
24
+
OUTPUT DIVIDER REQUIRED WITH VPRGM OPEN
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+
CIN
VIN
-
CB 0.1F M2
+
4.7F
-
R1 COUT RSENSE VOUT
+
1437 F15
LTC1436A LTC1436A-PLL/LTC1437A
TYPICAL APPLICATIONS
Intel Mobile CPU VID Core Power Converter with 1.8V I/O Supply
10k 0.1F 1 COSC 43pF CSS 0.1F RC 10k CC2 1000pF CC 220pF 2 3 4 7 6 100pF 8 9 1000pF 10 PLL LPF COSC RUN/SS TGL ITH VPROG SGND TGS SW INTVCC 17 *DB 0.22F
3
PLLIN VIN
LTC1436A-PLL VOSENSE SENSE - BG PGND AUXDR BOOST
SENSE+ AUX 11 AUXON ON/OFF 12 AUXFB
*CMDSH-3 **INPUT CAPACITOR MAY NOT BE NECESSARY IF 3.3V SUPPLY HAS SUFFICIENT CAPACITANCE
LTC1436A 3.3V/4A Fixed Output with 5V Auxiliary Output
COSC 68pF 1 2 CC2 51pF CSS 0.1F CC 510pF RC 10k 3 4 5 6 7 8 9 10 1000pF 11 COSC RUN/SS LBO LBI ITH SFB SGND VPROG VOSENSE SENSE - SENSE + LTC1436A POR BOOST TGL SW TGS VIN INTVCC BG PGND EXTVCC AUXDR AUXFB 24 23 22 21 20 19 CMDSH-3 18 17 16 15 14 13 R8 180k R7 56k 51pF 2N2905A R6 430k R5 100k 47k 0.1F M3 IRLML2803 T1 10H 1:1 M2 Si4412DY MBRS140T3 RSENSE 0.025 M1 S4412DY VIN 4.5V TO 28V
AUX 12 AUXON ON/OFF
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EXTERNAL FREQUENCY SYNCHRONIZATION 18 4.7 0.1F 21 19 20
VIN 4.5V TO 22V
+
M1 Si4410DY M3 IRLML2803 L1 3.3H
CIN 22F 35V X2 RSENSE 0.015
6
VCORE 1.3V TO 2V 7A
VCC
SENSE
22
+
16 15 13 4.7F M2 Si4410DY
D1 MBRS140T3
5
LTC1706-19 FB VID
0123 7 812
+
COUT 820F 4V x2
GND 4 SGND (PIN 6)
FROM P 47k MMBT2907L 10.5k 20k 51pF 47F 4V 47F 4V**
VIN2 3.3V VI/O 1.8V 150mA
1436 TA09
+
CIN 22F 35V x 2 MBRS1100T3
+
CSEC 3.3F 35V
24V VOUT 3.3V 4A
+
4.7F
+
COUT 100F 10V x2 SGND (PIN 7)
+
3.3F VOUT2 5V 100mA
1436 TA02
25
LTC1436A LTC1436-PLL-A/LTC1437A
TYPICAL APPLICATIONS
LTC1436A-PLL 2.5V/5V Adjustable Output with Foldback Current limiting and 5V Auxiliary Output
CLP RLP 0.01F 10k COSC CSS RC, 10k CC2 51pF 0.1F 68pF CC 510pF 1 2 3 4 5 6 7 100pF OPEN 8 9 1000pF 10 24 23 22 21 20 19 M3 IRLML2803 CMDSH-3 0.1F T1 10H 1:1.6 M2 Si4410DY 47k SGND (PIN 6) R8 180k 1N4148 VOUT2 5V 0.2A R7 56k 51pF ZETEX FZT749 R6 430k R5 100k MBRS140T3 RSENSE 0.02 M1 Si4410DY EXT CLOCK VIN 4.5V TO 24V
PLL LPF COSC RUN/SS ITH SFB SGND
AUX 11 ON/OFF 12
TGS LTC1436A-PLL 18 VPROG VIN 17 VOSENSE INTVCC 16 SENSE - BG 15 SENSE + PGND 14 AUXON EXTVCC 13 AUXDR AUXFB
ITH (PIN 4) 100 100
LTC1436A-PLL 5V/3A Fixed Output with 12V/200mA Auxiliary Output and Uncommitted Comparator
CLP RLP 0.01F 10k COSC CSS RC, 10k CC2 51pF 0.1F 68pF CC 510pF VIN 4.5V TO 28V 1 2 3 4 5 6 7 8 9 1000pF 10 PLL LPF COSC RUN/SS ITH SFB SGND PLLIN POR BOOST TGL SW TGS 24 EXT CLOCK 23 22 21 20 19 M3 IRLML2803 CMDSH-3 0.1F 1:2.2 RSENSE 0.025 47k CMDSH-3 M1 Si4412DY
COMP 11 ON/OFF 12
LTC1436A-PLL 18 VPROG VIN 17 VOSENSE INTVCC 16 SENSE - BG 15 SENSE + PGND 14 AUXON EXTVCC 13 AUXDR AUXFB COMPARATOR
T1: DALE LPE6562-A092
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PLLIN POR BOOST TGL SW
+
CIN 22F 35V x 2 MBRS1100T3
+
CSEC 3.3F 35V R1 100k 1% R2 35.7k 1%
24V VOUT 2.5V 5A
+
4.7F
+
100pF
COUT 100F 10V x2
+
3.3F
1436 TA03
+
CIN 22F/35V x2 M4, IRLL014
VOUT2 12V 0.5A
+
CSEC 3.3F 35V VOUT1 3.3V 4A
T1 10H
+
4.7F M2 Si4412DY MBRS140T3
+
COUT1 100F 10V x2
100k 1%k 11.3k 1%k
0.01F
SGND (PIN 6)
1436 TA04
LTC1436A LTC1436A-PLL/LTC1437A
TYPICAL APPLICATIONS
CLP RLP 0.01F 10k COSC CSS RC, 10k CC2 51pF 0.1F 39pF CC 510pF
1 2 3 4 5 6 7
PLL LPF COSC RUN/SS ITH SFB SGND VPROG
100pF 8 9 1000pF 10
VOSENSE SENSE -
SENSE + VOUT 11 AUXON ON/OFF 12 AUXFB
SFB = 0V: CONTINUOUS MODE SFB = 5V: BURST ENABLED
PACKAGE DESCRIPTION
0.015 0.004 x 45 (0.38 0.10) 0.0075 - 0.0098 (0.191 - 0.249) 0.016 - 0.050 (0.406 - 1.270) 0 - 8 TYP
0.053 - 0.069 (1.351 - 1.748)
0.008 - 0.012 (0.203 - 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.205 - 0.212** (5.20 - 5.38)
0 - 8 0.301 - 0.311 (7.65 - 7.90) 0.002 - 0.008 (0.05 - 0.21)
0.005 - 0.009 (0.13 - 0.22)
0.022 - 0.037 (0.55 - 0.95)
0.0256 (0.65) BSC
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1436A-PLL Low Noise High Efficiency 5V/1A Regulaor
PLLIN POR BOOST TGL SW TGS LTC1436A-PLL VIN 24 23 22 21 20 19 18 CMDSH-3 17 16 15 14 13 47k VOUT 5V 1A R8 180k 1% R7 56k 1% ZETEX FMMT549 22F HEAT SINK M3 IRLML2803 0.1F L1 50H RSENSE 0.1 R1 240k 1% M2 IRF7201 MBRS140T3 100pF R2 56k 1% SGND (PIN 6) V1 6.3V M1 IRF7201 EXT CLOCK 250kHz VIN 5.5V TO 28V
+
CIN 22F 35V
INVCC BG PGND EXTVCC AUXDR
+
4.7F
+
COUT 100F 10V
51pF
+
1436 TA07
Dimensions in inches (millimeters) unless otherwise noted. GN Package 24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.004 - 0.009 (0.102 - 0.249) 0.337 - 0.344* (8.560 - 8.737) 24 23 22 21 20 19 18 17 16 15 14 13
0.025 (0.635) BSC
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
1
23
4
56
7
8
9 10 11 12
GN24 (SSOP) 0595
G Package 28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.068 - 0.078 (1.73 - 1.99) 0.397 - 0.407* (10.07 - 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15
0.010 - 0.015 (0.25 - 0.38)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
G28 SSOP 0694
27
LTC1436A LTC1436-PLL-A/LTC1437A
TYPICAL APPLICATION
LTC1437A 5V/3A Fixed Output with 12V Auxiliary Output
CLP RLP 0.01F 10k COSC CSS CC2 51pF 0.1F 39pF VIN 5.5V TO 28V
1 2 3 4 5 CC 6 7 8 INT VCC 9 10 11 12 1000pF 13
PLL LPF COSC RUN/SS LBO LBI ITH SFB LTC1437A SGND VPROG VOSENSE NC SENSE - SENSE +
RC 10k
510pF
AUX 14 AUXON ON/OFF
T1: DALE LPE6562-A092
1436 TA06
RELATED PARTS
PART NUMBER LTC1142HV/LTC1142 LTC1148HV/LTC1148 LTC1159 LT 1375/LT1376 LTC1430 LTC1435A LTC1438/LTC1439 LT1510 LTC1538-AUX LTC1539 LTC1706-19
(R)
DESCRIPTION Dual High Efficiency Synchronous Step-Down Switching Regulators High Efficiency Step-Down Switching Regulator Controllers High Efficiency Synchronous Step-Down Switching Regulator 1.5A, 500kHz Step-Down Switching Regulators High Power Step-Down Switching Regulator Controller High Efficency, Low Noise Synchronous Step-Down Switching Regulator Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators Constant-Voltage/ Constant-Current Battery Charger Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulator Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulator VID Voltage Programmer
Pentium is a registered trademark of Intel Corp.
28
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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PLLIN POR BOOST TGL SW TGS VIN INVCC DRVCC BG PGND EXTVCC AUXDR AUXFB
28 27 26 25 24 23 22 21 20 19 18 17 16 15
EXT CLOCK
+
M1 IRF7403
CIN 22F 35V x 2 MBRS1100T3
+
M3 IRLML2803 CMDSH-3 0.1F T1 22H 1:2.2 M2 IRF7403 MBRS140T3 RSENSE 0.03
CSEC 3.3F 35V
24V VOUT 5V 3A
+
4.7F
+
COUT 100F 10V x2 SGND (PIN 8)
47k
VOUT2 12V 0.2A
MMBT2907
R6 1M R5 100k
+
3.3F
COMMENTS Dual Synchronous, VIN 20V Synchronous, VIN 20V Synchronous, VIN 40V, For Logic Threshold FETs High Frequency, Small Inductor, High Efficiency Switchers, 1.5A Switch High Efficiency 5V to 3.3V Conversion at Up to 15A 16-Pin Narrow SO and SSOP Full-Featured Dual Controllers 1.3A, Li-Ion, NiCd, NiMH, Pb-Acid Charger 5V Standby in Shutdown 5V Standby in Shutdown Intel Mobile Pentium(R)II Compliant
14367afa LT/TP 0898 REV A 2K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1996

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